The present invention relates to a test circuit for a LSI for use in a digital electronic watch.
Conventionally, a control circuit in a digital electronic watch is made up of flipflop circuits for holding the present mode and a ROM for determining the next mode by the present mode and a set of switch inputs. FIG. 1 shows an embodiment of a conventional switch input portion of a digital watch, and FIG. 2 shows an embodiment of a conventional mode determining portion of a digital watch.
In FIG. 1, numerals 1-4 are switch output terminals connected to Vss via pull-down resistors 5-8 and also to D inputs of flipflops 9-12. The flipflops 9-12 are provided to prevent the misoperation caused by chattering of the switch. A switch output is sampled by the falling edge of an SP signal in the figure. Outputs AA-DD from the flipflops 9-12 are fed to a control ROM 13 in FIG. 2. The control ROM 13 decides N.times.0-N.times.3 which indicate the next mode from the AA-DD and the signals MOD 0-MOD 3 produced from flipflops 14-17. Here the present mode is represented by the MOD 0-MOD 3 signals which carry out various controls. The MOD 0-MOD 3 signals change at the falling edge of the clock signal in the figure. Although the complicated controls are carried out comparatively easily by this circuit system, the mode can not be changed unless the combination of the switch inputs are changed. Thus it takes a considerably long time to set an arbitrary mode because a plurality of switches have to be operated in consideration of the present mode. This results in a serious problem in the LSI testing which should preferably be executed in an extremely short time.